The integrated circuit (IC) industry is currently researching and developing new metallic interconnect materials and structures which can be used within integrated circuits (ICs). A promising metallic material which will be used in the future for integrated circuit (IC) interconnects is copper (Cu). Copper is desired in the integrated circuit industry since copper has improved electromigration resistance over aluminum and other metallic materials which are currently being used in the integrated circuit industry. In addition, copper has a lower resistivity than other commonly used metallic materials, whereby the performance of integrated circuit devices can be greatly improved through the use of copper interconnects. Also, copper interconnects allow an integrated circuit to use higher critical current.
However, there is currently no known technology which can effectively plasma etch or wet etch copper materials so that functional copper interconnects are adequately formed over the surface of an integrated circuit. In order to overcome this limitation, copper chemical mechanical polishing (CMP) has been suggested as the most promising alternative which can render proper formation of copper interconnects on an integrated circuit. Therefore, the industry is currently searching for an optimal chemical mechanical polishing (CMP) slurry which can be used to form copper interconnects on an integrated circuit (IC).
In addition, copper readily diffuses into conventional silicon-based materials such as polysilicon, single-crystalline silicon, silicon dioxide, low-k inorganic and organic materials, and the like. Once these silicon-based materials have been contaminated with Cu atoms, the dielectric contstant of the silicon-based dielectrics is adversely affected. In addition, once semiconductive silicon-based materials are Cu doped, transistors made within or in close proximity to the Cu doped silicon-based regions either cease to function properly or are significantly degraded in electrical performance. Therefore, in addition to the challenges of finding an adequate copper polishing process, an adequate copper barrier material is also needed. In addition, this barrier material must be integrated with the CMP process to obtain optimal electrical performance, optimal planarization, improved throughput, etc., in order to render copper technology in IC designs feasible.
It is known to use one of Fe(NO.sub.3).sub.3, HNO.sub.3, HN.sub.4 OH, or KMnO.sub.4 to perform polishing of copper. These chemical compounds have been extensively researched by CMP engineers in an attempt to discover an optimal copper CMP process. However, the use of these known chemicals has not yet produced optimal copper polishing results. For example, various experimentation performed using the known chemistries described above have resulted in one or more of: (1) poor removal rate whereby CMP throughput is inadequate; (2) excessive pitting and/or corrosion of the copper material whereby device performance and device yield is reduced; (3) layer planarity problems; (4) poor IC electrical performance; or (5) poor selectivity to copper over adjacent oxide materials ("oxide" refers to "silicon dioxide" and the two may be used interchangeably herein.). In addition, the current CMP research using copper interconnects with tantalum-based barriers has shown that most widely-used copper CMP processes have high selectivity to tantalum-based alloys. With the high copper to tantalum selectivity of current copper polishing, a wafer must either be: (1) significantly overpolished to ensure adequate tantalum-based barrier material removal whereby copper regions are significantly dished (i.e., poor planarity results); or (2) polished less aggressively whereby some tantalum-based barrier material may remain on the device causing short circuits or excessive leakage paths in the IC.
Therefore, a need exist in the industry for an improved CMP slurry which may be used to manufacture copper interconnects while reducing or eliminating one or more of the above common copper CMP problems when copper is used in conjunction with a tantalum-based material. This improved slurry should have one or more of: good removal rate whereby CMP throughput is improved; reduced or eliminated pitting and corrosion of the copper material whereby device performance and yield is improved; improved planarity of the copper layer; improved electrical performance of integrated circuits, adequate selectivity of copper to oxide; and improved removal of a tantalum-based barrier without adversely affecting the overall copper structure.